PHN205 Datasheet | NXP Semiconductors

DISCRETE SEMICONDUCTORS DATA SHEET PHN205 Dual N-channel enhancement mode MOS transistor Product specification Supersedes data of 1997 Jun 18 File under Discrete Semiconductors, SC13b 1997 Oct 22 Philips Semiconductors Product specification Dual N-channel enhancement mode MOS transistor Features - High-speed switching - No secondary breakdown - Very low on-state resistance. APPLICATIONS - Motor and actuator driver - Power management - Synchronized rectification. DESCRIPTION Two N-channel enhancement mode MOS transistors in an 8-pin plastic SOT96-1 (SO8) package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 1 4 s1 g 1 handbook, halfpage PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL s1 g1 s2 g2 d2 d2 d1 d1 DESCRIPTION source 1 gate 1 source 2 gate 2 drain 2 drain 2 drain 1 drain 1 d1 d1 5 d2 d2 MAM117 s2 g Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL Per N-channel VDS VSD VGS VGSth ID RDSon Ptot drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation ID = 1 m A; VDS = VGS Ts = 80 °C ID = 3.2 A; VGS = 10 V Ts = 80 °C IS = 1.25 A - - - 1 - - - 30 1 ±20 2.8 6.4 50 3.5 V V V V A mΩ W PARAMETER CONDITIONS MIN. MAX. UNIT 1997 Oct 22 Philips Semiconductors Product specification Dual N-channel enhancement mode MOS transistor LIMITING VALUES In accordance with the...