PHN210T Datasheet | NXP Semiconductors

Dual N-channel Trench MOS intermediate level FET Rev. 02 - 15 December 2010 Product data sheet 1. Product profile 1.1 General description Dual intermediate level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using Trench MOS technology. This product is designed and qualified for use in puting, munications, consumer and industrial applications only. 1.2 Features and benefits - Suitable for high frequency applications due to fast switching characteristics - Suitable for logic level gate drive sources - Suitable for low gate drive sources 1.3 Applications - DC-to-DC converters - Logic level translators - Motor and relay drivers 1.4 Quick reference data Table 1. Symbol VDS Quick reference data Parameter drain-source voltage drain current total power dissipation drain-source on-state resistance Conditions Tj ≥ 25 °C; Tj ≤ 150 °C; Repetitive peak drain-source voltage Tsp = 25 °C; Single device Tsp = 25 °C [1] [2] Min - Typ - Max Unit 30 V ID Ptot - - 3.4 2 Static characteristics RDSon VGS = 4.5 V; ID = 1 A; Tj = 25 °C VGS = 10 V; ID = 2.2 A; Tj = 25 °C 120 80 200 100 mΩ mΩ Dynamic characteristics QGD gate-drain charge VGS = 10 V; ID = 2.3 A; VDS = 15 V; Tj = 25 °C 0.7 n C [1] [2] Surface mounted on FR4 board, t ≤ 10 sec. Surface mounted on FR4, t ≤ 10 sec. NXP Semiconductors Dual N-channel Trench MOS intermediate level FET 2. Pinning...