SC18IM700 Datasheet | NXP Semiconductors

description The SC18IM700 is designed to serve as an interface between the standard UART port of a microcontroller or microprocessor and the serial I2C-bus; this allows the microcontroller or microprocessor to municate directly with other I2C-bus devices. The SC18IM700 can operate as an I2C-bus master. The SC18IM700 controls all the I2C-bus specific sequences, protocol, arbitration and timing. The host municates with SC18IM700 with ASCII messages protocol; this makes the control sequences from the host to the SC18IM700 bee very simple. 2. Features s s s s s s s s s s s s s s s s UART host interface I2C-bus controller Eight programmable I/O pins High-speed UART: baud rate up to 460.8 kbit/s High-speed I2C-bus: 400 kbit/s 16-byte TXFIFO 16-byte RXFIFO Programmable baud rate generator 2.3 V and 3.6 V operation Sleep mode (power-down) UART message format resembles I2C-bus transaction format I2C-bus master functions Multi-master capability 5 V tolerance on the input pins 8 N 1 UART format (8 data bits, no parity bit, 1 stop bit) Available in very small TSSOP16 package 3. Applications s s s s s s Enable I2C-bus master support in a system I2C-bus instrumentation and control Industrial control Medical equipment Cellular telephones Handheld puters Philips Semiconductors Master I2C-bus controller with UART interface 4. Ordering information Table 1: Ordering information Package Name SC18IM700IPW TSSOP16 Description Version plastic thin shrink small outline package; 16 leads; SOT403-1 body width 4.4 mm Type number 5. Block diagram VDD VSS RX TX I2C-BUS CONTROLLER UART RESET WAKEUP GPIO REGISTER 002aab743 SDA SCL GPIOs Fig 1. Block diagram of SC18IM700 SC18IM700_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 01 - 28 February 2006 2 of 21 Philips Semiconductors Master I2C-bus controller with UART interface 6. Pinning information 6.1 Pinning GPIO0 GPIO1 RESET VSS GPIO2 GPIO3 SDA SCL 1...