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SC18IS600 - SPI to I2C-bus interface

Datasheet Summary

Description

The SC18IS600 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus.

This allows the host to communicate directly with other I2C-bus devices.

Features

  • SPI slave interface.
  • SPI Mode 3.
  • Single master I2C-bus controller.
  • Four General Purpose Input/Output (GPIO) pins.
  • Two quasi-bidirectional I/O pins.
  • 5 V tolerant I/O pins.
  • High-speed SPI: Up to 1.2 Mbit/s.
  • High-speed I2C-bus: 400 kbit/s.
  • 96-byte transmit buffer.
  • 96-byte receive buffer.
  • 2.4 V to 3.6 V operation.
  • Power-down mode with WAKEUP pin.
  • Internal oscillator.
  • Active LOW interrupt output.
  • Available in TSSOP16 package.

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Datasheet preview – SC18IS600

Datasheet Details

Part number SC18IS600
Manufacturer NXP
File Size 527.64 KB
Description SPI to I2C-bus interface
Datasheet download datasheet SC18IS600 Datasheet
Additional preview pages of the SC18IS600 datasheet.

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Full PDF Text Transcription

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SC18IS600 SPI to I2C-bus interface Rev. 8 — 9 October 2019 Product data sheet 1. General description The SC18IS600 is designed to serve as an interface between the standard SPI of a host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows the host to communicate directly with other I2C-bus devices. The SC18IS600 can operate as an I2C-bus master-transmitter or master-receiver. The SC18IS600 controls all the I2C-bus specific sequences, protocol, arbitration and timing. 2. Features and benefits  SPI slave interface  SPI Mode 3  Single master I2C-bus controller  Four General Purpose Input/Output (GPIO) pins  Two quasi-bidirectional I/O pins  5 V tolerant I/O pins  High-speed SPI: Up to 1.
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