NT5CB128M16JR - Commercial and Industrial DDR3(L) 2Gb SDRAM

This page provides the datasheet information for the NT5CB128M16JR, a member of the NT5CB256M8JQ Commercial and Industrial DDR3(L) 2Gb SDRAM family.

Product Overview

Nanya

Part number	NT5CB128M16JR
Manufacturer	Nanya
File Size	3.54 MB
Description	Commercial and Industrial DDR3(L) 2Gb SDRAM
Datasheet	NT5CB128M16JR Datasheet
Additional preview pages of the NT5CB128M16JR datasheet.

JEDEC DDR3 Compliant - 8n Prefetch Architecture - Differential Clock(CK/) and Data Strobe(DQS/) - Double-data rate on DQs, DQS and DM.
Data Integrity - Auto Self Refresh (ASR) by DRAM built-in TS - Auto Refresh and Self Refresh Modes.
Power Saving Mode - Power Down Mode.
Signal Integrity - Configurable DS for system compatibility - Configurable On-Die Termination - ZQ Calibration for DS/ODT impedance accuracy via external ZQ pad (240 ohm ± 1%).
Signal Synchroniza.

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Published: Aug 29, 2018 |