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CD4013BC - Dual D Flip-Flop

This page provides the datasheet information for the CD4013BC, a member of the CD4013BM Dual D Flip-Flop family.

Datasheet Summary

Description

The CD4013B dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors Each flip-flop has independent data set reset and clock inputs and ‘‘Q’’ and ‘‘Q’’ outputs These devices can be used for shift register applications

Features

  • Y Wide supply voltage range Y High noise immunity Y Low power TTL compatibility 3 0V to 15V 0 45 VDD (typ ) fan out of 2 driving 74L or 1 driving 74LS.

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CD4013BM CD4013BC Dual D Flip-Flop February 1988 CD4013BM CD4013BC Dual D Flip-Flop General Description The CD4013B dual D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors Each flip-flop has independent data set reset and clock inputs and ‘‘Q’’ and ‘‘Q’’ outputs These devices can be used for shift register applications and by connecting ‘‘Q’’ output to the data input for counter and toggle applications The logic level present at the ‘‘D’’ input is transferred to the Q output during the positive-going transition of the clock pulse Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line respectively Features Y Wide supply voltage range Y High noise imm
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