MC100EP195B Overview
s The MC100EP195B is a Programmable Delay Chip (PDC) designed primarily for clock deskewing and timing adjustment. It provides variable delay of a differential NECL/PECL input transition. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature pensation. .onsemi. MARKING DIAGRAMS* LQFP−32 FA SUFFIX CASE 561AB MC100 EP195B AWLYYWWG 32 QFN32 MN SUFFIX CASE 488AM 1 MC100 EP195B ALYWG
MC100EP195B Key Features
- Maximum Input Clock Frequency >1.2 GHz