MC100EP196A Overview
Select input pins D[10:0] may be threshold controlled by ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet. binations of interconnects between VEF (pin 7) and VCF (pin 8) for receiving LVCMOS, ECL, or LVTTL level signals. For LVCMOS input levels, leave VCF and VEF open. For ECL operation, short VCF and VEF (Pins 7 and 8). For LVTTL level operation, connect a 1.5 V supply reference to VCF and leave open VEF pin. The 1.5 V reference voltage at the VCF pin can be acplished by placing a 2.2 kW resistor between VCF and VEE for a 3.3 V power supply. The VBB pin, an internally generated voltage supply, is available to this device only. For single−ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple...