Datasheet Summary
2.5V/3.3V Differential 2:1 MUX to 4 LVPECL Fanout Buffer
Description The NB3L8533 is a low skew 1:4 LVPECL Clock fanout buffer designed explicitly for low output skew applications. The NB3L8533 Features a multiplexed input which can be driven by either a differential or single- ended input to allow for the distribution of a lower speed clock along with the high speed system clock.
The CLK_SEL pin will select the differential clock inputs, CLK and CLK, when LOW (or left open and pulled LOW by the internal pull- down resistor). When CLK_SEL is HIGH, the Differential PCLK and PCLK inputs are selected.
The mon enable (CLK_EN) is synchronous so that the outputs will only be...