Description
The NB3L8543S is a high performance, low skew 1
to
Clock Fanout Buffer.
Features
- a multiplexed input which can be driven
by either a differential or single.
- ended input to allow for the distribution of a lower speed clock along with the high speed system clock. The CLK_SEL pin will select the differential CLK and CLK inputs when LOW (or left open and pulled LOW by the internal pull.
- down resistor). When CLK_SEL is HIGH, the differential PCLK and PCLK inputs are selected. The common clock enable pin, CLK_EN, is synchronous so that the outputs will only be enable.
NB3L8543S Datasheet
