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NB3RL02
Low Phase-Noise Two-Channel Clock Fanout Buffer
The NB3RL02 is a low−skew, low jitter 1:2 clock fan−out buffer, ideal for use in portable end−equipment, such as mobile phones. With integrated LDO and output control circuitry.
The MCLK_IN pin has an AC coupling capacitor and will directly accept a square or sine wave clock input, such as a temperature compensated crystal oscillator (TCXO). The minimum acceptable input amplitude of the sine wave is 300 mV peak−to−peak.
The two clock outputs are enabled by control inputs CLK_REQ1 and CLK_REQ2.
The NB3RL02 has an integrated Low−Drop−Out (LDO) voltage regulator which accepts input voltages from 2.3 V to 5.5 V and outputs 1.8 V at Iout = 50 mA. This 1.
NB3RL02 Datasheet
