Description
P3P623S05/09 is a versatile, 3.3V Zero-delay buffer designed to distribute Timing-Safe™ clocks with Peak EMI reduction.
P3P623S05 is an eight-pin version, accepts one reference input and drives out five low-skew Timing-Safe™ clocks.
Features
- Clock distribution with Timing-Safe™ Peak EMI Reduction.
- Input frequency range: 20MHz - 50MHz.
- Multiple low skew Timing-safe™ Outputs: P3P623S05: 5 Outputs P3P623S09: 9 Outputs.
- Supply Voltage: 3.3V±0.3V.
- Packaging Information: P3P623S05: 8 pin TSSOP P3P623S09:16 pin TSSOP.
- True Drop-in Solution for Zero Delay Buffer All outputs have less than 200pS of cycle-to-cycle jitter. The input and output propagation delay is guaranteed to be less tha.