Puya Semiconductor P24C512
The P24C512 is I2C-compatible Serial EEPROM (Electrically Erasable Programmable Memory) device. It contains a memory array of 512 Kbits (64 Kbytes), which is organized in 128 bytes per page.GENERAL DESCRIPTION
FEATURES
● Single Supply Voltage and High Speed Mode● Minimum operating voltage down to 1.7V
● 400 kHz/1MHz clock from 1.7V to 5.5V
● Low power CMOS technology
● Schmitt Trigger, Filtered Inputs for Noise Suppression
● Sequential & Random Read
FEATURES
● 128 bytes Page Write Modes, Partial Page Writes Allowed● Write protect of the whole memory array
● Additional Write Lockable Page
● Self-timed Write Cycle (5ms maximum)
● High Reliability
● Endurance: 1 Million Write Cycles
● Data Retention: 100 Years
● HBM: 6 kV
● Latch up Capability: +/- 200mA (25C)
● Package: PDIP8,SOP8,TSSOP8,DFN8,UDFN8 Puya Semiconductor 1/22 1. Pin Configuration P24C512 Datasheet Rev.1.5 1.1 Pin Configuration Figure 1-1 Pin Configuration E0 1 E1 2 E2 3 Vss 4 P24C512 8 VCC 7 WCB 6 SCL 5 SDA 1.2 Pin Definition PDIP8/SOP8/TSSOP8/DFN8/UDFN8 Table 1-1 Pin Definition for PDIP8/SOP8/TSSOP8/DFN8/UDFN8 Packages Pin Name Type
DESCRIPTION
1 E0 Input Slave Address Setting 2 E1 Input Slave Address Settin...