HYI39S128160F
HYI39S128160F is 128-MBit Synchronous DRAM manufactured by Qimonda.
Overview
Features
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- Data Mask for Read / Write control (x4, x8) Data Mask for Byte Control (x16) Auto Refresh (CBR) and Self Refresh Power Down and Clock Suspend Mode 4096 refresh cycles / 64 ms (15.6 μs) Random Column Address every CLK (1-N Rule) Single 3.3 V ± 0.3 V Power Supply LVTTL Interface Plastic Packages: P(G)- TSOPII- 54 400 mil width
This chapter lists all main features of the product family HY[B/I]39S128[40/80/16][0/7]F[E/T](L) and the ordering information.
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- Fully Synchronous to Positive Clock Edge 0 to 70 °C Standard Operating Temperature -40 to 85 °C Industrial Operating Temperature Four Banks controlled by BA0 & BA1 Programmable CAS Latency: 2 & 3 Programmable Wrap Sequence: Sequential or Interleave Programmable Burst Length: 1, 2, 4, 8 and full page Multiple Burst Read with Single Write Operation Automatic and Controlled Precharge mand
TABLE 1
Performance
Product Type Speed Code Speed Grade Max. Clock Frequency @CL3
- 7 PC133- 222 Unit
- MHz ns ns ns ns
@CL2 f CK3 t CK3 t AC3 t CK2 t AC2
143 7 5.4 7.5 5.4
Description
The HY[B/I]39S128[40/80/16][0/7]F[E/T](L) are four bank Synchronous DRAM’s organized as 32 MBit x4, 16 MBit x8 and 8 Mbit x16 respectively. These synchronous devices...
