ICS854S296I-33 - LVDS Programmable Delay-Line

Product Overview

Renesas

Part number	ICS854S296I-33
Manufacturer	Renesas
File Size	420.46 KB
Description	LVDS Programmable Delay-Line
Datasheet	ICS854S296I-33 Datasheet
Additional preview pages of the ICS854S296I-33 datasheet.

The ICS854S296I-33 is a high performance LVDS Programmable Delay Line.

The delay can vary from 2.2ns to 12.5ns in 10ps steps.

The ICS854S296I-33 is characterized to operate from a 3.3V power supply and is guaranteed over industrial temperature range.

One LVDS level output.
One differential clock input pair.
Differential input clock (IN, nIN) can accept the following signaling levels: LVPECL, LVDS, CML.
Maximum frequency: 1.2GHz.
Programmable Delay Range: 2.2ns to 12.5ns in 10ps steps.
D[9:0] can accept LVPECL, LVCMOS or LVTTL levels.
Full 3.3V supply voltages.
-40°C to 85°C ambient operating temperature.
Available in lead-free (RoHS 6) package ICS854S296DKI-33.

ICS854S202I - Differential-to-LVDS Multiplexer (IDT)
ICS854S204I - LVPECL FANOUT BUFFER (Integrated Device Technology)
ICS854S006I - Differential-to-LVDS Fanout Buffer (IDT)
ICS854S013 - 1-TO-3 DIFFERENTIAL-TO-LVDS FANOUT BUFFER (Integrated Device Technology)
ICS854S01I - 2:1 Differential-to-LVDS Multiplexer (IDT)
ICS854S054I - 4:1 Differential-to-LVDS Clock Multiplexer (Integrated Device Technology)
ICS854S057BI - 4:1 or 2:1 LVDS Clock Multiplexer (Integrated Device Technology)
ICS854S058I - 8:1 Differential-to-LVDS Clock Multiplexer (Integrated Device Technology)
ICS85401 - 2:1 DIFFERENTIAL-TO-LVDS MULTIPLEXER (Integrated Circuit Systems)
ICS854054 - 4:1 DIFFERENTIAL-TO-LVDS CLOCK MULTIPLEXER (Integrated Circuit Systems)

Other Datasheets by Renesas

Published: Oct 28, 2021 |