RC31012B Datasheet | Renesas

Description The RC310xx B are high-performance programmable jitter attenuators with network synchronization capabilities. The devices support JEDEC JESD204B/C for converter synchronization, and Sync E for network-based synchronization. The RC310xx B are ideal for driving converter circuits in wire-line infrastructure, data center equipment, and instrumentation applications. Applications - Switches / Routers - Synchronous Ethernet (Sync E) equipment - Tele Time Slave Clock (T-TSC) equipment - Jitter attenuation for 10 / 25 / 40 / 100 / 200 / 400 Gbps Ethernet PHYs or Switches - Small Cell for 4.5G and 5G Features - 169fs RMS phase jitter at 156.25MHz (typ.) - PCIe® Gen7 mon Clock jitter: 8fs RMS (typ.) - pliant with ITU-T G.8262 and G.8262.1 for synchronous Ethernet Equipment Clock (EEC/e EEC) - Jitter attenuation with programmable loop bandwidth from 0.1Hz to 12k Hz - 1k Hz to 650MHz LVDS/LP-HCSL outputs - 1k Hz to 200MHz LVCMOS outputs - Simple AC-coupling to LVPECL and CML - Integrated 100 and 85 LP-HCSL terminations - JESD204B/C support on differential or singleended outputs with DC-coupling or AC-coupling - Up to four single-ended or two differential clock inputs; one crystal/TCXO/OCXO input - 1MHz I2C, 400k Hz SMBus or 20MHz SPI support - Configuration via factory-programmed One-Time Programmable (OTP) memory, serial interface, or external I2C EEPROM - OTP holds up to four plete or 27 partial configurations - 1.8V, 2.5V, 3.3V, -40° to +85°C operation - RC31012B - 12 output pairs/24 single-ended outputs - 6 × 6 mm 48-QFN, integrated crystal option - RC31008B - 8 differential/16 single-ended outputs - 5 × 5 mm 40-QFN, integrated crystal option - RC31005B - 5 differential/10 single-ended outputs - 4 × 4 mm 32-LGA with integrated crystal Sync E RX Clk Uplink PHY Eth Switch ASIC Downlink PHY Eth Controller PCIe, etc. RC31xxx...