RC31012A - VersaClock 7 Programmable Jitter Attenuator

RCxx012A 8 1.3 Pin Assignments RCxx008A

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RCxx008A

• 169fs RMS typical phase jitter.
• PCIe® Gen6 Common Clock (CC) 27fs RMS.
• Compliant with ITU-T G.8262 and G.8262.1 for synchronous Ethernet Equipment Clock (EEC/eEEC).
• Jitter attenuation with programmable loop bandwidth from 0.1Hz to 12kHz.
• 1kHz to 650MHz LVDS/LP-HCSL outputs.
• 1kHz to 200MHz LVCMOS outputs.
• Simple AC-coupling to LVPECL and CML.
• Integrated 100 and 85 LP-HCSL terminations.
• JESD204B/C support on differential or singleended outputs with D.