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RC31008A - VersaClock 7 Programmable Jitter Attenuator

General Description

RCxx012A 8 1.3 Pin Assignments RCxx008A

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RCxx008A

Key Features

  • 169fs RMS typical phase jitter.
  • PCIe® Gen6 Common Clock (CC) 27fs RMS.
  • Compliant with ITU-T G.8262 and G.8262.1 for synchronous Ethernet Equipment Clock (EEC/eEEC).
  • Jitter attenuation with programmable loop bandwidth from 0.1Hz to 12kHz.
  • 1kHz to 650MHz LVDS/LP-HCSL outputs.
  • 1kHz to 200MHz LVCMOS outputs.
  • Simple AC-coupling to LVPECL and CML.
  • Integrated 100 and 85 LP-HCSL terminations.
  • JESD204B/C support on differential or singleended outputs with D.

📥 Download Datasheet

Datasheet Details

Part number RC31008A
Manufacturer Renesas
File Size 1.99 MB
Description VersaClock 7 Programmable Jitter Attenuator
Datasheet download datasheet RC31008A Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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RC310xxA VersaClock 7 Programmable Jitter Attenuator Family Datasheet The RC310xxA (RC31008A and RC31012A) are high-performance programmable jitter attenuators with network synchronization capabilities. The devices support JEDEC JESD204B/C for converter synchronization, and SyncE for network-based synchronization. The RC310xxA devices ideal for driving converter circuits in wire-line infrastructure, data center equipment, and instrumentation applications. Applications ▪ Switches / Routers ▪ Synchronous Ethernet (SyncE) equipment ▪ Telecom Time Slave Clock (T-TSC) equipment ▪ Jitter attenuation for 10 / 25 / 40 / 100 / 200 / 400 Gbps Ethernet PHYs or Switches ▪ Small Cell for 4.