M58LT256JSB Datasheet | STMicroelectronics

Features - Supply voltage - VDD = 1.7 V to 2.0 V for program, erase and read - VDDQ = 2.7 V to 3.6 V for I/O Buffers - VPP = 9 V for fast program Synchronous / Asynchronous Read - Synchronous Burst Read mode: 52 MHz - Random access: 85 ns - Asynchronous Page Read mode Synchronous Burst Read Suspend Programming time - 5 µs typical Word program time using Buffer Enhanced Factory Program mand Memory organization - Multiple Bank memory array: 16 Mbit banks - Parameter Blocks (top or bottom location) Dual operations - program/erase in one Bank while read in others - No delay between read and write operations Block protection - All blocks protected at Power-up - Any bination of blocks can be protected with zero latency - Absolute Write Protection with VPP = VSS Security - Software security features - 64 bit unique device number - 2112 bit user programmable OTP Cells mon Flash Interface (CFI) 100 000 program/erase cycles per block - - - TBGA64 (ZA) 10 x 13 mm - - - Electronic signature - Manufacturer Code: 20h - Top Device Codes: M58LT256JST: 885Eh - Bottom Device Codes M58LT256JSB: 885Fh TBGA64 package - ECOPACK® pliant - - - - - June 2007 Rev 2 1/106 .st. 1 .. Contents M58LT256JST, M58LT256JSB Contents 1 2 Description -...