MASTERGAN3 Datasheet | STMicroelectronics

Features - 600 V system-in-package integrating half-bridge gate driver and high-voltage power Ga N transistors in asymmetrical configuration: - QFN 9 x 9 x 1 mm package - RDS(ON) = 225 mΩ (LS) + 450 mΩ (HS) - IDS(MAX) = 6.5 A (LS) + 4 A (HS) - Reverse current capability - Zero reverse recovery loss - UVLO protection on low-side and high-side - Internal bootstrap diode - Interlocking function - Dedicated pin for shutdown functionality - Accurate internal timing match - 3.3 V to 15 V patible inputs with hysteresis and pull-down - Overtemperature protection - Bill of material reduction - Very pact and simplified layout - Flexible, easy and fast design. Application - Switch-mode power supplies - Chargers and adapters - High-voltage PFC, and DC-DC converters Description The MASTERGAN3 is an advanced power system-in-package integrating a gate driver and two enhancement mode Ga N transistors in asymmetrical half‑bridge configuration. The integrated power Ga Ns have 650 V drain‑source blocking voltage and RDS(ON) of 225 mΩ and 450 mΩ for Low side and High side respectively, while the high side of the embedded gate driver can be easily supplied by the integrated bootstrap diode, while the high side of the embedded gate driver can be easily supplied by the integrated bootstrap diode. The MASTERGAN3 features UVLO protection on both the lower and upper driving sections, preventing the power switches from operating in low efficiency or dangerous conditions, and the interlocking function avoids cross-conduction conditions. The input pins extended range allows easy interfacing with microcontrollers, DSP units or Hall effect sensors. The MASTERGAN3 operates in the industrial temperature range, -40°C to 125°C. The device is available in a pact 9x9 mm QFN package. DS13724 - Rev 1 - May 2021 For further information contact your local STMicroelectronics sales office. .st. Block diagram Figure 1. MASTERGAN3 block diagram Block diagram VCC UVLO HIN LIN...