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S amHop Microelectronics C orp.
S T S 3623
J un, 09 2006
Dual N-Channel Enhancement Mode Field Effect Transistor
P R ODUC T S UMMAR Y
V DS S
30V
F E AT UR E S S uper high dense cell design for low R DS (ON ).
ID
4A
R DS (ON) ( m : ) Max
50 @ V G S = 10V 65 @ V G S = 4.5V
R ugged and reliable. S OT-26 package.
D1 D2
S OT26 Top View
G1 S2 G2
1 2 3
6 5 4
D1 S1 D2
G1 S1
G2 S2
AB S OL UTE MAXIMUM R ATINGS (T A =25 C unles s otherwis e noted)
P arameter Drain-S ource Voltage Gate-S ource Voltage Drain C urrent-C ontinuous @ T J =25 C b -P ulsed Drain-S ource Diode Forward C urrent Maximum P ower Dissipation a Operating Junction and S torage Temperature R ange S ymbol V DS V GS ID IDM IS PD T J , T S TG Limit 30 20 4 16 1.25 1.
STS3623 Datasheet
