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K4H560838F-TC Datasheet Ddr Sdram 256mb F-die

Manufacturer: Samsung Semiconductor

Overview: DDR SDRAM 256Mb F-die (x8, x16) DDR SDRAM 256Mb F-die DDR SDRAM Specification Revision 1.1 Rev. 1.1 August. 2003 DDR SDRAM 256Mb F-die (x8, x16) 256Mb F-die Revision History Revision 1.0 (June, 2003) - First version for internal review Revision 1.1 (Agust, 2003) - Added x8 org (K4H560838F) and speed AA DDR SDRAM Rev. 1.1 August.

General Description

DDR SDRAM 16Mb x 16 32Mb x 8 VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 NC VDDQ LDQS NC VDD NC LDM WE CAS RAS CS NC BA0 BA1 AP/A10 A0 A1 A2 A3 VDD VDD DQ0 VDDQ NC DQ1 VSSQ NC DQ2 VDDQ NC DQ3 VSSQ NC NC VD

Key Features

  • Double-data-rate architecture; two data transfers per clock cycle.
  • Bidirectional data strobe L(U)DQS.
  • Four banks operation.
  • Differential clock inputs(CK and CK).
  • DLL aligns DQ and DQS transition with CK transition.
  • MRS cycle with address key programs -. Read latency 2, 2.5 (clock) -. Burst length (2, 4, 8) -. Burst type (sequential & interleave).
  • All inputs except data & DM are sampled at the positive going edge of the system clock(.

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