KM23C8100DET Datasheet | Samsung Semiconductor

FEATURES - Switchable organization 1,048,5762 x 8(byte mode) 524,288 x 16(word mode) - Fast access time : 100ns(Max.) - Supply voltage : single +5V - Current consumption Operating : 50m A(Max.) Standby : 50µA(Max.) - Fully static operation - All inputs and outputs TTL patible - Three state outputs - Package -. KM23C8100D(E)T : 44-TSOP2-400 CMOS MASK ROM GENERAL DESCRIPTION The KM23C8100D(E)T is a fully static mask programmable ROM fabricated using silicon gate CMOS process technology, and is organized either as 1,048,576 x8 bit(byte mode) or as 524,288 x16 bit(word mode) depending on BHE voltage level.(See mode selection table) This device operates with a 5V single power supply, and all inputs and outputs are TTL patible. Because of its asynchronous operation, it requires no external clock assuring extremely easy operation. It is suitable for use in program memory of microprocessor, and data memory, character generator. The KM23C8100D(E)T is packaged in a 44-TSOP2. FUNCTIONAL BLOCK DIAGRAM PRODUCT INFORMATION Product KM23C8100DT KM23C8100DET Operating Temp Range 0°C~70°C -20°C~85°C Vcc Range (Typical) 5.0V Speed (ns) 100 A18 - . . . A0 A-1 X BUFFERS AND DECODER MEMORY CELL MATRIX (524,288x16/ 1,048,576x8) Y BUFFERS AND DECODER SENSE AMP. DATA OUT BUFFERS PIN CONFIGURATION N.C A18 A17 A7 A6 A5 A4 A3 1 2 3 4 5 6 7 8 44 N.C 43 N.C 42 A8 41 A9 40 A10 39 A11 38 A12 37 A13 36 A14 35 A15 34 A16 33 BHE 32 VSS 31 Q15 /A-1 30 Q7 29 Q14 28 Q6 27 Q13 26 Q5 25 Q12 24 Q4 23 VCC . . . CE OE BHE CONTROL LOGIC Q0/Q8 Q7/Q15 A2 9 A1 10 A0 11 Pin Name A0 - A18 Q0 - Q14 Q15 /A-1 BHE CE OE VCC VSS N.C Pin Function Address Inputs Data Outputs Output 15(Word mode)/ LSB Address(Byte mode) Word/Byte selection Chip Enable Output Enable Power ( +5V) Ground No Connection CE 12 VSS 13 OE 14 Q0 15 Q8 16 Q1 17 Q9 18 Q2 19 Q10 20 Q3 21 Q11 22 TSOP2 KM23C8100D(E)T .. KM23C8100D(E)T ABSOLUTE MAXIMUM RATINGS Item Voltage on Any Pin Relative to VSS Temperature Under Bias...