Download the K7J323682M datasheet PDF.
This datasheet also covers the K7J321882M variant, as both devices belong to the same (k7j321882m / k7j323682m) 1mx36 & 2mx18 ddr ii sio b2 sram family and are provided as variant models within a single manufacturer datasheet.
General Description
on page 2 and add HSTL I/O comment 6.
Deleted R/W control pin description on page 2 1.
Update current characteristics in DC electrical characteristics 2.
Key Features
1.8V+0.1V/-0.1V Power Supply.
DLL circuitry for wide output data valid window and future freguency scaling.
I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
Separate independent read and write data ports.
HSTL I/O.
Synchronous pipeline read with self timed late write.
Registered address, control and data input/output.
Note: The manufacturer provides a single datasheet file (K7J321882M_Samsungsemiconductor.pdf) that lists specifications for multiple related part numbers.
Full PDF Text Transcription for K7J323682M (Reference)
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K7J323682M. For precise diagrams, and layout, please refer to the original PDF.
K7J323682M K7J321882M www.DataSheet4U.com Document Title 1Mx36 & 2Mx18 DDR II SIO b2 SRAM 1Mx36-bit, 2Mx18-bit DDR II SIO b2 SRAM Revision History Rev. No. 0.0 0.1 Histor...
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2Mx18-bit DDR II SIO b2 SRAM Revision History Rev. No. 0.0 0.1 History 1. Initial document. 1. Pin name change from DLL to Doff 2. Update JTAG test conditions. 3. Reserved pin for high density name change from NC to Vss/SA 4. Delete AC test condition about Clock Input timing Reference Level 5. Delete clock description on page 2 and add HSTL I/O comment 6. Deleted R/W control pin description on page 2 1. Update current characteristics in DC electrical characteristics 2. Change AC timing characteristics 3. Update JTAG instruction coding and diagrams 1. Add AC electrical characteristics. 2. Change AC timing characteristics.
K7J323682M Datasheet
