K4D261638K Overview
FOR 2M x 16Bit x 4 Bank DDR SDRAM The K4D261638K is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNG’s high performance CMOS.
K4D261638K Key Features
- 2.5V + 5% power supply for device operation
- 2.5V + 5% power supply for I/O interface
- SSTL_2 patible inputs/outputs
- 4 banks operation
- MRS cycle with address key programs -. Read latency 2,3(clock) -. Burst length (2, 4 and 8) -. Burst type (sequential &
- All inputs except data & DM are sampled at the positive going edge of the system clock
- Differential clock input
- Wrtie-Interrupted by Read Function
- 2 DQS’s ( 1DQS / Byte )
- Data I/O transactions on both edges of Data strobe
K4D261638K Applications
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