K4D263238G-GC Overview
K4D263238G-GC 128M GDDR SDRAM 128Mbit GDDR SDRAM 1M x 32Bit x 4 Banks Graphic Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL (144-Ball FBGA) Revision 1.4 November 2004 Samsung Electronics reserves the right to change products or specification without notice.
K4D263238G-GC Key Features
- 2.5V ± 5% power supply for device operation
- 2.5V ± 5% power supply for I/O interface
- SSTL_2 patible inputs/outputs
- 4 banks operation
- MRS cycle with address key programs -. Read latency 3, 4 (clock) -. Burst length (2, 4 and 8) -. Burst type (sequential
- All inputs except data & DM are sampled at the positive going edge of the system clock
- Differential clock input
- No Wrtie-Interrupted by Read Function
- 4 DQS’s ( 1DQS / Byte )
- Data I/O transactions on both edges of Data strobe
