Download K4D551638F-TC Datasheet PDF
K4D551638F-TC page 2
Page 2
K4D551638F-TC page 3
Page 3

K4D551638F-TC Key Features

  • 2.6V + 0.1V power supply for device operation
  • 2.6V + 0.1V power supply for I/O interface
  • SSTL_2 patible inputs/outputs
  • 4 banks operation
  • MRS cycle with address key programs -. Read latency 3 (clock) -. Burst length (2, 4 and 8) -. Burst type (sequential & i
  • All inputs except data & DM are sampled at the positive going edge of the system clock
  • Differential clock input
  • No Write-Interrupted by Read Function
  • 2 DQS’s ( 1DQS / Byte )
  • Data I/O transactions on both edges of Data strobe

K4D551638F-TC Description

FOR 4M x 16Bit x 4 Bank GDDR SDRAM The K4D551638F is 268,435,456 bits of hyper synchronous data rate Dynamic RAM organized as 4.