K4D553238F-JC Overview
FOR 2M x 32Bit x 4 Bank GDDR SDRAM The K4D553238F is 268,435,456 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 2,097,152 words by 32 bits, fabricated with SAMSUNG’s high performance CMOS technology.
K4D553238F-JC Key Features
- 2.5V + 5% power supply for device operation
- 2.5V + 5% power supply for I/O interface
- SSTL_2 patible inputs/outputs
- 4 banks operation
- MRS cycle with address key programs -. Read latency 3, 4 (clock) -. Burst length (2, 4 and 8) -. Burst type (sequential
- All inputs except data & DM are sampled at the positive going edge of the system clock
- Differential clock input
- No Wrtie-Interrupted by Read Function
- 4 DQS’s ( 1DQS / Byte )
- Data I/O transactions on both edges of Data strobe