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LH530800A - CMOS 1M (128K x 8) MROM

General Description

The LH530800A is a mask-programmable ROM organized as 131,072 × 8 bits (1,048,576 bits).

It is fabricated using silicon-gate CMOS process technology.

Key Features

  • 131,072 words × 8 bit organization.
  • Access time: 150 ns (MAX. ).
  • Power consumption: Operating: 192.5 mW (MAX. ) Standby: 550 µW (MAX. ).
  • Static operation.
  • TTL compatible I/O.
  • Three-state outputs.
  • Single +5 V power supply.
  • Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP 32-pin, 450-mil QFJ (PLCC).
  • JEDEC standard EPROM pinout (DIP).

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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LH530800A FEATURES • 131,072 words × 8 bit organization • Access time: 150 ns (MAX.) • Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 µW (MAX.) • Static operation • TTL compatible I/O • Three-state outputs • Single +5 V power supply • Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP 32-pin, 450-mil QFJ (PLCC) • JEDEC standard EPROM pinout (DIP) DESCRIPTION The LH530800A is a mask-programmable ROM organized as 131,072 × 8 bits (1,048,576 bits). It is fabricated using silicon-gate CMOS process technology.