LH530800A Description
The LH530800A is a mask-programmable ROM organized as 131,072 × 8 bits (1,048,576 bits). It is fabricated using silicon-gate CMOS process technology. LH530800A Block Diagram PIN DESCRIPTION SIGNAL PIN NAME NOTE SIGNAL PIN NAME NOTE A0 - A16 D0 - D7 CE OE/OE Address input Data Output Chip enable input Output enable input 1 1 VCC GND NC Power supply (+5 V) Ground No connection NOTE:.
LH530800A Key Features
- 131,072 words × 8 bit organization
- Access time: 150 ns (MAX.)
- Power consumption: Operating: 192.5 mW (MAX.) Standby: 550 µW (MAX.)
- Static operation
- TTL patible I/O
- Three-state outputs
- Single +5 V power supply
- Packages: 32-pin, 600-mil DIP 32-pin, 525-mil SOP 32-pin, 450-mil QFJ (PLCC)
- JEDEC standard EPROM pinout (DIP) DESCRIPTION
- A16 D0