LH531024 Description
The LH531024 is a mask-programmable ROM organized as 65,536 × 16 bits. It is fabricated using silicon-gate CMOS process technology. Pin numbers apply to the 40-pin DIP or SOP.
LH531024 Key Features
- 65,536 words × 16 bit organization
- Access time: 100 ns (MAX.)
- Power consumption: Operating: 412.5 mW (MAX.) Standby: 550 µW (MAX.)
- Static operation
- TTL patible I/O
- Three-state outputs
- Single +5 V power supply
- JEDEC standard EPROM pinout (DIP)
- A15 D0
- D15 CE