LH531000B-S Datasheet | Sharp Corporation

FEATURES - 131,072 words × 8 bit organization - Access time: 500 ns (MAX.) - Power consumption: Operating: 64.8 m W (MAX.) Standby: 108 µW (MAX.) - Mask-programmable control pin: Pin 20 = CE/OE/OE - Static operation - Three-state outputs - Low power supply: 2.6 V to 3.6 V - Package: 28-pin, 450-mil SOP CMOS 1M (128K × 8) 3 V-Drive MROM DESCRIPTION The LH531000B-S is a mask-programmable ROM organized as 131,072 × 8 bits. It is fabricated using silicon-gate CMOS process technology. PIN CONNECTIONS 28-PIN SOP TOP VIEW A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 VCC A14 A13 A8 A9 A11 A16 A10 CE/OE/OE D7 D6 D5 D4 D3 531000BS-1 Figure 1. Pin Connections for DIP Package CMOS 1M MROM A16 22 A15 1 A14 27 A13 26 A10 21 A9 24 A8 25 A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 ADDRESS DECODER ADDRESS BUFFER A12 2 A11 23 MEMORY MATRIX (131,072 x 8) COLUMN SELECTOR SENSE AMPLIFIER CE BUFFER TIMING GENERATOR CE/OE/OE 20 OE BUFFER OUTPUT BUFFER 28 14 VCC GND 11 D0 12 D1 13 D2 15 D3 16...