• Part: Si5325
  • Description: uP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER
  • Manufacturer: Silicon Labs
  • Size: 1.38 MB
Download Si5325 Datasheet PDF
Silicon Labs
Si5325
Si5325 is uP-PROGRAMMABLE PRECISION CLOCK MULTIPLIER manufactured by Silicon Labs.
Features - Not remended for new - Dual clock outputs with designs. For alternatives, see the selectable signal format Si533x family of products. (LVPECL, LVDS, CML, CMOS) - Generates frequencies from - Support for ITU G.709 and 2 k Hz to 945 MHz and select custom FEC ratios (255/238, frequencies to 1.4 GHz from an 255/237, 255/236) input frequency of 10 to 710 MHz- LOS, FOS alarm outputs - - - Low jitter clock outputs with jitter generation as low as 0.5 ps rms - (12 k Hz- 20 MHz) - Integrated loop filter with selectable loop bandwidth (150 k Hz to 2 MHz) - Dual clock inputs w/manual or automatically controlled - I2C or SPI programmable On-chip voltage regulator for 1.8 ±5%, 2.5 or 3.3 V ±10% operation Small size: 6 x 6 mm 36-lead QFN Pb-free, ROHS pliant switching Applications - SONET/SDH OC-48/STM-16 and OC-192/STM-64 line cards - Gb E/10Gb E, 1/2/4/8/10GFC line cards - ITU...