WCSN0436V1P Overview
The WCSN0436V1P is a 3.3V, 128K by 36 synchronous-pipelined Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The WCSN0436V1P is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle.
WCSN0436V1P Key Features
- Supports 166-MHz bus operations with zero wait states
- Data is transferred on every clock
- Internally self-timed output buffer control to eliminate the need to use OE
- Fully registered (inputs and outputs) for pipelined operation
- Byte Write capability
- 128K x 36 mon I/O architecture
- Single 3.3V power supply
- Fast clock-to-output times
- 3.5 ns (for 166-MHz device)
- 3.8 ns (for 150-MHz device)