WCSS0418V1P Description
The WCSS0418V1P is a 3.3V, 256K by 18 synchronous-pipelined cache SRAM designed to support zero wait state secondary cache with minimal glue logic. PowerPC is a trademark of IBM Corporation. 38-05247 Revised February 6, 2001.
WCSS0418V1P Key Features
- Supports 100-MHz bus for Pentium and PowerPC™ operations with zero wait states
- Fully registered inputs and outputs for pipelined operation
- 256K by 18 mon I/O architecture
- 3.3V core power supply
- 2.5V / 3.3V I/O operation
- Fast clock-to-output times
- 3.5 ns (for 166-MHz device)
- 4.0 ns (for 133-MHz device)