W3E16M64S-XBX Description
The 128MByte (1Gb) DDR SDRAM is a high-speed CMOS, dynamic random-access, memory using 4 chips containing 268,435,456 bits. Each chip is internally configured as a quad-bank DRAM. Each of the chip’s 67,108,864-bit banks is organized as 8,192 rows by 512 columns by 16 bits.
W3E16M64S-XBX Key Features
- 17% I/O Reduction Reduced trace lengths for lower parasitic capacitance Suitable for hi-reliability