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CDC337 - Clock Driver

General Description

The CDC337 is a high-performance, low-skew clock driver.

It is specifically designed for applications requiring synchronized output signals at both the clock frequency and one-half the clock frequency.

The four Y outputs switch in phase and at the same frequency as the clock (CLK) input.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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D Low Output Skew, Low Pulse Skew for Clock-Distribution and Clock-Generation Applications D TTL-Compatible Inputs and CMOS-Compatible Outputs D Distributes One Clock Input to Eight Outputs – Four Same-Frequency Outputs – Four Half-Frequency Outputs D Distributed VCC and Ground Pins Reduce Switching Noise D High-Drive Outputs (– 48-mA IOH, 48-mA IOL) D State-of-the-Art EPIC-ΙΙB™ BiCMOS Design Significantly Reduces Power Dissipation D Package Options Include Plastic Small-Outline (DW) CDC337 CLOCK DRIVER WITH 3-STATE OUTPUTS SCAS330B – DECEMBER 1990 – REVISED OCTOBER 1998 DW PACKAGE (TOP VIEW) Y3 1 GND 2 Y4 3 VCC 4 OE 5 CLR 6 VCC 7 Q4 8 GND 9 Q3 10 20 Y2 19 GND 18 Y1 17 VCC 16 CLK 15 GND 14 VCC 13 Q1 12 GND 11 Q2 description The CDC337 is a high-performance, low-skew clock driver.