CDC339 Datasheet | Texas Instruments

Features - Low Output Skew, Low Pulse Skew for Clock Distribution and Clock-Generation Applications - TTL-patible Inputs and Outputs - Distributes One Clock Input to Eight Outputs - Four Same-Frequency Outputs - Four Half-Frequency Outputs - Distributed VCC and Ground Pins Reduce Switching Noise - High-Drive Outputs (- 48-m A IOH, 48-m A IOL) - State-of-the-Art EPIC-ΙΙB™ Bi CMOS Design Significantly Reduces Power Dissipation - Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DB) Packages 2 Applications - Data center switch and server motherboard 3 Description The CDC339 is a high-performance, low-skew clock driver. It is specifically designed for applications requiring synchronized output signals at both the primary clock frequency and one-half the primary clock frequency. The four Y outputs switch in phase and at the same frequency as the clock (CLK) input. The four Q outputs switch at one-half the frequency of CLK. When the output-enable (OE) input is low and the clear (CLR) input is high, the Y outputs follow CLK and the Q outputs toggle on low-to-high transitions of CLK. Taking CLR low asynchronously resets the Q outputs to the low level. When OE is high, the outputs are in the high-impedance state. The CDC339 is characterized for operation from - 40°C to 85°C. Device Information PART NUMBER CDC339DW CDC339DB PACKAGE(1) SOIC (20) SSOP (20) BODY SIZE (NOM) 132 mm² 12.8 x 10.3 38 mm² 5.3 x 7.2 (1) For all available packages, see the orderable addendum at the end of the data sheet. Logic Symbol Logic Diagram (Positive Logic) An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, Copyrighint t©el2le0c2t0u Tael xparso Ipnesrtrtuymmeanttste Irnscoarnpdoraottehder important disclaimers. PRODUCTION DATA. Submit Document Feedback Product Folder Links: CDC339 SCAS331A - MARCH 1994 - REVISED MAY 2020 .ti. Table of Contents 1 Features...