CSD83325L Datasheet | Texas Instruments

Features - 1 mon Drain Configuration - Low-On Resistance - Small Footprint of 2.2 mm × 1.15 mm - Lead Free - Ro HS pliant - Halogen Free - Gate ESD Protection 2 Applications - Battery Management - Battery Protection 3 Description This 12-V, 9.9-mΩ, 2.2-mm × 1.15-mm LGA Dual Nex FET™ power MOSFET is designed to minimize resistance and gate charge in a small footprint. Its small footprint and mon drain configuration make the device ideal for battery pack applications in small handheld devices. Top View S1 S2 G1 G2 S1 S2 Configuration Product Summary TA = 25°C TYPICAL VALUE VS1S2 Source-to-Source Voltage Qg Gate Charge Total (4.5 V) Qgd Gate Charge Gate-to-Drain VGS = 2.5 V 17.5 RS1S2(on) Source-to-Source On Resistance VGS = 3.8 V 10.9 VGS = 4.5 V 9.9 VGS(th) Threshold Voltage UNIT V n C n C mΩ mΩ mΩ...