| Part Number | 74HC138D |
|---|---|
| Manufacturer | Nexperia |
| Overview | The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device features three enable inputs (E1, E2 and E3). Every output. three enable inputs (E1, E2 and E3). Every output will be HIGH unless E1 and E2 are LOW and E3 is HIGH. This multiple enable function allows easy parallel expansion to a 1-of-32 (5 to 32 lines) decoder with just four '138 ICs and one inverter. The '138 can be used as an eight output demultiplexer by. |
74HC138D Datasheet
The 74HC138D is a 3-to-8 line decoder/demultiplexer.
| Part Number | 74HC138D |
|---|---|
| Description | 3-to-8 Line Decoder |
| Manufacturer | Toshiba |
| Overview | • 3-to-8 Line Decoder 2. General The 74HC138D is a high speed CMOS 3-to-8 DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while . (1) High speed: tpd = 16 ns (typ.) at VCC = 5 V (2) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 (3) Balanced propagation delays: tPLH ≈ tPHL (4) Wide operating v. |