74HCT175 Datasheet
74HCT175 Datasheet (Nexperia)
Nexperia
The 74HC175; 74HCT175 is a quad positive-edge triggered D-type flip-flop with individual data inputs (Dn) and complementary outputs (Qn and Qn). The common clock (CP) and master reset (MR) inputs load.
and benefits
* Input levels:
* For 74HC175: CMOS level
* For 74HCT175: TTL level
* Four edge-triggered D-type flip-flops
* Asynchronous master reset
* Complies with JEDEC standard no. 7A
* ESD protection:
* HBM JESD22-A114F exceeds 2000 V
* MM JESD22-A115-A exceeds 200 V
* Specified from -40 °C to +.
74HCT175 Datasheet (Philips Semiconductors)
Philips Semiconductors
The 74HC/HCT175 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. 74HC/HCT175 The 74HC/HCT1.
* Four edge-triggered D flip-flops
* Output capability: standard
* ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT175 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
74HC/HCT175
The 74HC.