P4C198 Datasheet
P4C198 Datasheet (PYRAMID)
PYRAMID
The P4C198/L and P4C198A/L are 65,536-bit ultra highspeed static RAMs organized as 16K x 4. Each device features an active low Output Enable control to eliminate data bus contention. The P4C198/L also.
Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)
* 10/12/15/20/25 ns (Commercial)
* 12/15/20/25/35 ns (Industrial)
* 15/20/25/35/45 ns (Military)
Low Power Operation (Commercial/Military)
5V ± 10% Power Supply
Data Retention, 10 µA Typical Current from 2.0V P4C198L/198AL (Military)
Outp.
P4C198 Datasheet (Unknown Manufacturer)
Unknown Manufacturer
The P4C198/L and P4C198A/L are 65,536-bit ultra highspeed static RAMs organized as 16K x 4. Each device features an active low Output Enable control to eliminate data bus contention. The P4C198/L also.
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times)
* 10/12/15/20/25 ns (Commercial)
* 12/15/20/25/35 ns (Industrial)
* 15/20/25/35/45 ns (Military) Low Power Operation (Commercial/Military)
* 715 mW Active
* 12/15
* 550/660 mW Active
* 20/25/35/45/55
* 193/220 mW Standby (TTL Input)
* 83/1.