54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates.
National Semiconductor
54LS109 - Dual Positive-Edge-Triggered J-K Flip-Flops
Obsolete 54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs June 1989 54LS109 DM.
National Semiconductor
54LS10 - Triple 3-Input NAND Gates
54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates June 1989 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates General Description This device con.
National Semiconductor
DM54LS10 - Triple 3-Input NAND Gates
54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates June 1989 54LS10 DM54LS10 DM74LS10 Triple 3-Input NAND Gates General Description This device cont.
National Semiconductor
DM54LS109A - Dual Positive-Edge-Triggered J-K Flip-Flops with Preset/ Clear/ and Complementary Outputs
54LS109 DM54LS109A DM74LS109A Dual Positive-Edge-Triggered J-K Flip-Flops with Preset Clear and Complementary Outputs June 1989 54LS109 DM54LS109A D.
Motorola Inc
SN54LS10 - TRIPLE 3-INPUT NAND GATE
SN54/74LS10 TRIPLE 3-INPUT NAND GATE TRIPLE 3-INPUT NAND GATE VCC 14 13 12 11 10 9 8 LOW POWER SCHOTTKY 1 2 3 4 5 6 7 GND 14 1 J SUFFIX CERA.
Motorola Inc
SN54LS107A - DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN54/74LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct Clear and Clock Pulse .
Motorola Inc
SN54LS109A - DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP
SN54/74LS109A DUAL JK POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54/ 74LS109A consists of two high speed completely independent transition clocked JK fli.
Texas Instruments
SN54LS10 - TRIPLE 3-INPUT POSITIVE-NAND GATES
SN5410, SN54LS10, SN54S10, SN7410, SN74LS10, SN74S10 TRIPLE 3-INPUT POSITIVE-NAND GATES SDLS035A – DECEMBER 1983 – REVISED APRIL 2003 PRODUCTION DATA.
Texas Instruments
SN54LS107A - DUAL J-K FLIP-FLOPS
SN54107, SN54LS107A, SN74107, SN74LS107A DUAL J-K FLIP-FLOPS WITH CLEAR SDLS036 – DECEMBER 1983 – REVISED MARCH 1988 PRODUCTION DATA information is c.
Texas Instruments
SN54LS109A - Dual J-K Positive-Edge-Triggered Flip-Flops
PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/30109BEA Status Package Type Package Pins Package .
Texas Instruments
54LS109A - Dual J-K Positive-Edge-Triggered Flip-Flops
www.ti.com PACKAGE OPTION ADDENDUM 4-Dec-2021 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan (1) Drawi.
