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Data Sheet FEATURES Equivalent input bandwidth: 9.3 GHz typical Propagation delay: 85 ps typical Overdrive and slew rate dispersion: 10 ps typical Inp

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DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops April 1986 Revised March 2000 DM74LS373 • DM74LS374 3-S

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HD74LV573A Octal D-type Transparent Latches with 3-state Outputs Description REJ03D0519–0100 Rev.1.00 Feb. 01, 2005 The HD74LV573A has eight D typ

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PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 PACKAGING INFORMATION Orderable Device SN54196J SN54197J SNJ54196J SNJ54197J Status Package Type P

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Unit: mm 24.50 25.40 Max 20 11 7.00 Max 6.30 1 0.89 1.27 Max 10 1.30 2.54 Min 5.08 Max 7.62 0.51 Min 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15

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SN54HC373, SN74HC373 SCLS140F – DECEMBER 1982 – REVISED APRIL 2022 SNx4HC373 Octal Transparent D-Type Latches With 3-State Outputs 1 Features • Wide

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DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops May 1992 DM54LS373 DM74LS373 DM54LS

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STR83145 AND STR84145 INTERIM ISSUE (subject to change without notice) August 16, 1994 Data Sheet 28190 LATCHED, UNIVERSAL INPUT-VOLTAGE SWITCHES In

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6273 ADVANCE INFORMATION (Subject to change without notice) January 24, 2000 CLEAR IN 1 IN 2 OUT 1 OUT 2 OUT 3 OUT 4 IN 3 IN 4 GROUND 1 2 3 4 VDD 20 1

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HD74LS373 Octal D-type Transparent Latches (with three-state outputs) REJ03D0482–0200 Rev.2.00 Feb.18.2005 The HD74LS373, 8-bit register features to

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54LS279 DM54LS279 DM74LS279 Quad S-R Latches May 1989 54LS279 DM54LS279 DM74LS279 Quad S-R Latches General Description The ’LS279 consists of four

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INTEGRATED CIRCUITS FBL2033 3.3V BTL 8-bit latched/registered/pass-thru universal transceiver Product specification IC23 data handbook 1999 Apr 15 P

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INTEGRATED CIRCUITS 74ABT16260/74ABTH16260 12-bit to 24-bit multiplexed D-type latches (3-State) Product specification Supersedes data of 1996 Nov 20

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5881 BiMOS II DUAL 8-BIT LATCHED DRIVER 5881 BiMOS II DUAL 8-BIT LATCHED DRIVER WITH READ BACK With 16 CMOS data latches (two sets of eight), CMOS co

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5821 AND 5822 BiMOS II 8-BIT SERIAL-INPUT, LATCHED DRIVERS A merged combination of bipolar and MOS technology gives these devices an interface flexib

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www.DataSheet4U.com EW-412, EW-512 BIPOLAR HALL EFFECT LATCHES Note : It is requested to read and accept IMPORTANT NOTICE written on the back of th

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www.DataSheet4U.com Data Sheet 26185.112B A6821 DABiC-5 8-Bit Serial Input Latched Sink Drivers A merged combination of bipolar and MOS technology g

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SN5475, SN5477, SN54LS75, SN54LS77 SN7475, SN74LS75 4-BIT BISTABLE LATCHES SDLS120 – MARCH 1974 – REVISED MARCH 1988 PRODUCTION DATA information is c

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74ABT543A Octal latched transceiver with dual enable; 3-state Rev. 5 — 3 November 2011 Product data sheet 1. General description The 74ABT543A hi

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