PIP Datasheet | Specifications & PDF Download

GS840Z18CGT/GS840Z36CGT 100-Pin TQFP Commercial Temp Industrial Temp 4Mb Pipelined and Flow Through Synchronous NBT SRAMs 250 MHz–100 MHz 3.3 V VDD

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< DIPIPM > SLIMDIP-S TRANSFER MOLDING TYPE INSULATED TYPE OUTLINE MAIN FUNCTION AND RATINGS  RC-IGBT inverter bridge for three phase DC-to-AC power

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GS8322Z72(C) 209 BGA Commercial Temp Industrial Temp 36Mb Pipelined and Flow Through Synchronous NBT SRAM 250 MHz–133 MHz 2.5 V or 3.3 V VDD 2.5 V

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CY7C1305BV18 CY7C1307BV18 18-Mbit Burst of 4 Pipelined SRAM with QDR™ Architecture Features Functional Description • Separate independent Read and

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< DIPIPM > SLIMDIP-L TRANSFER MOLDING TYPE INSULATED TYPE OUTLINE MAIN FUNCTION AND RATINGS  RC-IGBT inverter bridge for three phase DC-to-AC power

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www.DataSheet4U.com A67L1618/A67L0636 Series Preliminary Document Title 2M X 16, 1M X 36 LVTTL, Pipelined ZeBLTM SRAM Revision History Rev. No. 0.0 0

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www.DataSheet4U.com A67P1618/A67P0636 Series Preliminary Document Title 2M X 18, 1M X 36 LVTTL, Pipelined ZeBLTM SRAM Revision History Rev. No. 0.0 0

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www.DataSheet4U.com A67P1618/A67P0636 Series Preliminary Document Title 2M X 18, 1M X 36 LVTTL, Pipelined ZeBLTM SRAM Revision History Rev. No. 0.0 0

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Copyrighted material licensed to Fermi National Laboratory by Thomson Scientific, Inc. (www.techstreet.com). This copy downloaded on 2015-05-12 15:14:

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100-Pin TQFP Commercial Temp Industrial Temp GS8160Z18/36T-250/225/200/166/150/133 18Mb Pipelined and Flow Through 250 MHz–133 MHz Synchronous NBT

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www.DataSheet4U.com PREMILINARY CY7C1302DV25 9-Mbit Burst of Two Pipelined SRAMs with QDR™ Architecture Features • Separate independent Read and Wr

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CY7C1370B CY7C1372B 512K × 36/1M × 18 Pipelined SRAM with NoBL Architecture Features • Zero Bus Latency, no dead cycles between Write and Read cycle

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IS61LP6432A IS61LP6436A 64K x 32, 64K x 36 SYNCHRONOUS PIPELINED STATIC RAM FEATURES • Internal self-timed write cycle • Individual Byte Write Control

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A67L8316/A67L8318/ A67L7332/A67L7336 Series 256K X 16/18, 128K X 32/36 Preliminary Document Title 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM

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A67L8316/A67L8318/ A67L7332/A67L7336 Series 256K X 16/18, 128K X 32/36 Preliminary Document Title 256K X 16/18, 128K X 32/36 LVTTL, Pipelined DBA SRAM

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CY7C1352G 4-Mbit (256K × 18) Pipelined SRAM with NoBL™ Architecture 4-Mbit (256K × 18) Pipelined SRAM with NoBL™ Architecture Features ■ Pin compatib

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CY7C1460BV25 CY7C1462BV25 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Architecture 36-Mbit (1 M × 36/2 M × 18) Pipelined SRAM with NoBL™ Ar

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CY7C1354CV25 CY7C1356CV25 9-Mbit (256K × 36/512K × 18) Pipelined SRAM with NoBL™ Architecture 9-Mbit (256K × 36/512K × 18) Pipelined SRAM with NoBL™

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CY7C1370KV25 CY7C1372KV25 18-Mbit (512K × 36/1M × 18) Pipelined SRAM with NoBL™ Architecture 18-Mbit (512K × 36/1M × 18) Pipelined SRAM with NoBL™ Ar

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CY7C1470BV33 CY7C1472BV33 CY7C1474BV33 72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined SRAM with NoBL™ Architecture 72-Mbit (2 M × 36/4 M × 18/1 M × 7

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