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PLL52C61-01HA - Pentium/SDRAM Clock Generator
PLL52C61-01HA/-21HA Pentium/SDRAM Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium, AMD and Cyrix syste.PLL52C59-14T - System Clock Generator
PLL52C59-14T System Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium and CYRIX CPU. n Provides 4 copies.PLL52C64-06 - Clock Generator
PLL52C64-06 Clock Gen er ator with Zero De lay Out put Buff ers FEATURES n Generates 7 synchronous zero delay PCI bus clocks. n Designed to work with .PLL52C61-23 - Pentium/SDRAM Clock Generator
PLL52C61-23 Pentium/SDRAM Clock Generator for 2-DIMM FEATURES n Generates all clock frequencies for Pentium, AMD and Cyrix system requiring multiple .PLL52C59-14A - System Clock Generator
PLL52C59-14A System Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium, CYRIX and AMD CPU. n Provides 4 c.PLL601-12 - Dual Output PLL Clock
m Preliminary PLL601-12 o c . Output PLL Clock with Selectable Odd Multiplier Dual U t4 FEATURES e PIN CONFIGURATION e (Top View) h • Selectable multi.PL611S-19 - PicoPLLTM KHz to MHz Programmable Clock
(Preliminary) PL611s-19 0.5kHz-55MHz MHz to KHz Programmable Clock TM FEATURES • Designed for Very Low-Power applications • Offered in Tiny GREEN /R.PLL102-03 - Low Skew Output Buffer
PLL102-03 Low Skew Output Buffer FEATURES Frequency range 75 ~ 180MHz. Internal phase locked loop will allow spread spectrum modulation on reference c.PLL102-04 - Low Skew Output Buffer
PLL102-04 Low Skew Output Buffer FEATURES Frequency range 50 ~ 120MHz. Internal phase locked loop will allow spread spectrum modulation on reference c.PLL102-05 - Low Skew Output Buffer
PLL102-05 Low Skew Output Buffer FEATURES Frequency range 25 ~ 60MHz. Internal phase locked loop will allow spread spectrum modulation on reference cl.PLL102-10 - Low Skew Output Buffer
PLL102-10 Low Skew Output Buffer FEATURES Frequency range 50 ~ 120MHz. Internal phase locked loop will allow spread spectrum modulation on reference c.PLL102-15 - Low Skew Output Buffer
PLL102-15 Low Skew Output Buffer FEATURES Frequency range 25 ~ 60MHz. Internal phase locked loop will allow spread spec trum modulation on reference c.PL130-00 - Selectable High Speed Translator Buffer to CMOS
(Preliminary) PL130-00 Selectable High Speed Translator Buffer to CMOS, PECL, LVDS FEATURES User selectable output: Differential PECL, Differential.PLL205-01 - Motherboard Clock Generator
FEATURES • • w w• • • • • • • • w Generates all clock frequencies for VIA K7 chip sets requiring multiple CPU clocks and high speed SDRAM buffers. .PLL205-03 - Motherboard Clock Generator
m PLL205-03 o c . Motherboard Clock Generator for AMD - K7 U 4 t e FEATURES PIN CONFIGURATION e h • Generates all clock frequencies for VIA K7 chip S .PLL205-11 - Motherboard Clock Generator
m PLL205-11 o c . Motherboard Clock Generator for AMD - K7 U t4 e FEATURES PIN CONFIGURATION e h • Generates all clock frequencies for VIA K7 chip S s.PLL205-13 - Motherboard Clock Generator
m PLL205-13 o c . Motherboard Clock Generator for AMD - K7 U 4 t e FEATURES PIN CONFIGURATION e h • Generates all clock frequencies for VIA K7 chip S .PLL620-09 - (PLL620-05/06/07/08/09) Low Phase Noise XO
m PLL620-05/-06/-07/-08/-09 o c . XO with multipliers (for 120-200MHz Fund Xtal) Low Phase Noise U Universal Low Phase Noise IC’s 4 t e e FEATURES h P.PLL600-20 - (PLL600-10/20/30) Ultra Low Current XO
FEATURES • • • w • • • • • • • • w w Low phase noise (-130 dBc @ 10kHz offset at 30MHz). CMOS output with OE tri-state control. Selectable oscill.PLL600-30 - (PLL600-10/20/30) Ultra Low Current XO
FEATURES • • • w • • • • • • • • w w Low phase noise (-130 dBc @ 10kHz offset at 30MHz). CMOS output with OE tri-state control. Selectable oscill.