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PLL52C59-14T - System Clock Generator
PLL52C59-14T System Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium and CYRIX CPU. n Provides 4 copies.PLL52C64-06 - Clock Generator
PLL52C64-06 Clock Gen er ator with Zero De lay Out put Buff ers FEATURES n Generates 7 synchronous zero delay PCI bus clocks. n Designed to work with .PLL52C61-01HA - Pentium/SDRAM Clock Generator
PLL52C61-01HA/-21HA Pentium/SDRAM Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium, AMD and Cyrix syste.PLL52C59-14A - System Clock Generator
PLL52C59-14A System Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium, CYRIX and AMD CPU. n Provides 4 c.PLL601-12 - Dual Output PLL Clock
m Preliminary PLL601-12 o c . Output PLL Clock with Selectable Odd Multiplier Dual U t4 FEATURES e PIN CONFIGURATION e (Top View) h • Selectable multi.PLL102-03 - Low Skew Output Buffer
PLL102-03 Low Skew Output Buffer FEATURES Frequency range 75 ~ 180MHz. Internal phase locked loop will allow spread spectrum modulation on reference c.PLL102-04 - Low Skew Output Buffer
PLL102-04 Low Skew Output Buffer FEATURES Frequency range 50 ~ 120MHz. Internal phase locked loop will allow spread spectrum modulation on reference c.PLL102-05 - Low Skew Output Buffer
PLL102-05 Low Skew Output Buffer FEATURES Frequency range 25 ~ 60MHz. Internal phase locked loop will allow spread spectrum modulation on reference cl.PLL102-10 - Low Skew Output Buffer
PLL102-10 Low Skew Output Buffer FEATURES Frequency range 50 ~ 120MHz. Internal phase locked loop will allow spread spectrum modulation on reference c.PLL102-15 - Low Skew Output Buffer
PLL102-15 Low Skew Output Buffer FEATURES Frequency range 25 ~ 60MHz. Internal phase locked loop will allow spread spec trum modulation on reference c.PL130-00 - Selectable High Speed Translator Buffer to CMOS
(Preliminary) PL130-00 Selectable High Speed Translator Buffer to CMOS, PECL, LVDS FEATURES User selectable output: Differential PECL, Differential.PL611-01 - Programmable Quick Turn Clock
PL611-01 Programmable Quick Turn Clock T M FEATURES Advanced programmable PLL design Very low Jitter and Phase Noise (30-70ps Pk-Pk typical) Up to 3 p.PLL520-10 - Low Phase Noise VCXO
PLL520-10 www.DataSheet4U.com Low Phase Noise VCXO with multipliers (for 65-130MHz Fund Xtal) DIE CONFIGURATION OUTSEL0^ 65 mil FEATURES • • • • • •.PL613-21 - Programmable 3-PLL Clock
PL613-21 Ultra Low Power PicoPLL, Programmable 3-PLL Clock IC FEATURES Designed for PCB Space Savings with 3 LowPower Programmable PLLs Ultra Low.PL613-05 - 3-Output Clock
(Preliminary)PL613-05 1.8V-3.3V PicoPLL, 3-PLL, 200MHz, 3 Output Clock IC FEATURES DESCRIPTION • Designed for PCB space savings with 3 low-power Th.PLL52C61-23 - Pentium/SDRAM Clock Generator
PLL52C61-23 Pentium/SDRAM Clock Generator for 2-DIMM FEATURES n Generates all clock frequencies for Pentium, AMD and Cyrix system requiring multiple .PLL52C61-21HA - Pentium/SDRAM Clock Generator
PLL52C61-01HA/-21HA Pentium/SDRAM Clock Generator with Integrated Buffers FEATURES n Generates all clock frequencies for Pentium, AMD and Cyrix syste.PLL205-14 - Programmable Clock Generator
m Preliminary PLL205-14 o c . Programmable Clock Generator for VIA KT-266 Chipset U 4 t FEATURES PIN CONFIGURATION e e frequencies for VIA KT266 • Gen.PLL205-54 - Programmable Clock Generator
m Preliminary PLL205-54 o c . Programmable Clock Generator for VIA KT-266 Chipset U 4 t FEATURES PIN CONFIGURATION e e • Generates all clock frequenci.PLL205-16 - Programmable Clock Generator
m Preliminary PLL205-16 o c . Programmable Clock Generator for VIA KT-266 Chipset U t4 FEATURES PIN CONFIGURATION e e frequencies for VIA KT266 • Gene.