PLL601-15 Datasheet (PhaseLink) - Low Phase Noise PLL Clock Multiplier

PLL601-15, Low Phase Noise PLL Clock Multiplier

The PLL601-15 is a low cost, high performance and low phase noise clock synthesizer.

It implements PhaseLink’s proprietary analog and digital Phase Locked Loop techniques for a fixed 5x multiplier.

The chip accepts crystal or clock inputs ranging from 20 to 30MHz, and produces outputs clocks up to

PLL601-15 Features

* e h

* Full swing CMOS S outputs with 25 mA drive capability a at TTL levels. t 20-30MHz crystal or clock.

* Reference a

* Integrated crystal load capacitor: no external .D load capacitor required. w

* Output clocks up to 150MHz at 3.3V. w

* Low phase noise (-1