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PLL601-12 Dual Output PLL Clock

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Description

m Preliminary PLL601-12 o c .Output PLL Clock with Selectable Odd Multiplier Dual U t4 .
The PLL601-12 is a highly flexible XO with selectable multipliers and two CMOS outputs (one of which can be selected to be REF_CLK).

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Datasheet Specifications

Part number
PLL601-12
Manufacturer
PhaseLink
File Size
106.20 KB
Datasheet
PLL601-12_PhaseLink.pdf
Description
Dual Output PLL Clock

Features

* e PIN CONFIGURATION e (Top View) h
* Selectable multipliers (x2.5, x2.75, x3, x4.25, x5, x5.5, x5.75, S x6, x6.25, x10, x11, x11.5, x12, a x12.5). t
* Crystala range from 13MHz to 31MHz (see SelecD tion Table for detailed acceptable input ranges). .
* w Maximum output frequen

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