PLL601-12 Datasheet (PhaseLink) - Dual Output PLL Clock

PLL601-12, Dual Output PLL Clock

The PLL601-12 is a highly flexible XO with selectable multipliers and two CMOS outputs (one of which can be selected to be REF_CLK).

Thanks to PhaseLink’s advanced Phase Locked Loop technology, it allows a wide choice of selectable multipliers which permits the user to achieve useful frequencies f

PLL601-12 Features

* e PIN CONFIGURATION e (Top View) h

* Selectable multipliers (x2.5, x2.75, x3, x4.25, x5, x5.5, x5.75, S x6, x6.25, x10, x11, x11.5, x12, a x12.5). t

* Crystala range from 13MHz to 31MHz (see SelecD tion Table for detailed acceptable input ranges). .

* w Maximum output frequen