PLL601-01 Datasheet (PhaseLink) - Low Phase Noise PLL Clock Multiplier

PLL601-01, Low Phase Noise PLL Clock Multiplier

The PLL601-01 is a low cost, high performance and low phase noise clock synthesizer.

With PhaseLink’s proprietary analog and digital Phase Locked Loop techniques, the chip accepts 10-27MHz crystal or clock input, and produces outputs clocks up to 160MHz at 3.3V.

BLOCK DIAGRAM S3 S2 S1 S0 m o .c

PLL601-01 Features

* e h

* Full swing CMOS S outputs with 25 mA drive capability a at TTL levels. t 10-27MHz fundamental crystal or

* Reference a clock. .D crystal load capacitor: no external

* Integrated w load capacitor required. w

* Output clocks up to 160MHz at 3.3V. w

* Low ph