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PLL601-02 Low Phase Noise PLL Clock Multiplier

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Description

.
The PLL601-02 is a low cost, high performance and low phase noise clock synthesizer.

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Datasheet Specifications

Part number
PLL601-02
Manufacturer
PhaseLink
File Size
75.43 KB
Datasheet
PLL601-02_PhaseLink.pdf
Description
Low Phase Noise PLL Clock Multiplier

Features

* w
* w w Full swing CMOS outputs with 25 mA drive capability at TTL levels. Reference 10-27MHz crystal or clock. Integrated crystal load capacitor: no external load capacitor required. Output clocks

Applications

* MULTIPLIER SELECT TABLE BLOCK DIAGRAM S3 S1 S0 ROM Based Multipliers w w w . D t a S a e h S3 0 0 0 0 1 1 1 1 t e S1 0 0 1 1 0 0 1 1 U 4 8 . c m o GND S0 0 1 0 1 0 1 0 1 CLK Test Reserved 4x Input (Low Frequency VCO
* ) 8x Input (Low Frequency VCO
* ) Reserved XO Frequency Pass t

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