triggered Datasheet | Specifications & PDF Download

74LVC16374A-Q100; 74LVCH16374A-Q100 16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state Rev. 3 — 27 September 2021 Product data sheet 1

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SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119 − DECEMBER 1983 − R

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Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0

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DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs September 1986 Revised July 2001 DM7474 Dual Posi

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INTEGRATED CIRCUITS 74LVC16374A/74LVCH16374A 16-bit edge triggered D-type flip-flop with 5 Volt tolerant inputs/outputs (3-State) Product specificati

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PACKAGE OPTION ADDENDUM www.ti.com 24-Aug-2018 PACKAGING INFORMATION Orderable Device JM38510/30109BEA Status Package Type Package Pins Package

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SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119 − DECEMBER 1983 − R

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DM54LS373 DM74LS373 DM54LS374 DM74LS374 TRI-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops May 1992 DM54LS373 DM74LS373 DM54LS

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SN74LS74A Dual D−Type Positive Edge−Triggered Flip−Flop The SN74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high sp

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INTEGRATED CIRCUITS 74ALVT16374 2.5V/3.3V 16-bit edge-triggered D-type flip-flop (3-State) Product specification Supersedes data of 1998 Feb 13 IC23

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HD74LV374A Octal Edge-Triggered D-type Flip-Flops with 3-state Outputs REJ03D0332–0200Z (Previous ADE-205-275 (Z)) Rev.2.00 Jun. 25, 2004 Description

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DM74LS373 • DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops April 1986 Revised March 2000 DM74LS373 • DM74LS374 3-S

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SN54/74LS74A DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce

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INTEGRATED CIRCUITS DATA SHEET 74LVC162374A; 74LVCH162374A 16-bit edge triggered D-type flip-flop with 30 Ω series termination resistors; 5 V input/

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54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop December 1994 54F 74F74 Dual D-Type Positive Edge-Triggered Flip-Flop General Description Th

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TECHNICAL DATA IN74ACT112 Dual J-K Flip-Flop with Set and Reset High-Speed Silicon-Gate CMOS The IN74ACT112 is identical in pinout to the LS/ALS112,

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w w a D . w S a t e e h U 4 t m o .c w w .D w t a S a e h U 4 t e .c m o w w w .D a S a t e e h U 4 t m o .c

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SN5474, SN54LS74A, SN54S74 SN7474. SN74LS74A, SN74S74 DUAL DĆTYPE POSITIVEĆEDGEĆTRIGGERED FLIPĆFLOPS WITH PRESET AND CLEAR SDLS119 − DECEMBER 1983 − R

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74ACT11074 DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET SCAS498A – DECEMBER 1986 – REVISED APRIL 1996 D Inputs Are TTL-Voltage

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